1. Field of the Invention
The invention relates to a liquid crystal display device, and more particularly, to an array substrate for a fringe field switching (FFS) mode liquid crystal display (LCD) device and a method of manufacturing the same.
2. Discussion of the Related Art
Generally, a liquid crystal display (LCD) device uses optical anisotropy and polarization properties of liquid crystal molecules. The liquid crystal molecules have a definite alignment direction as a result of their thin and long shapes. The alignment direction of the liquid crystal molecules can be controlled by applying an electric field across the liquid crystal molecules.
In other words, as the intensity or direction of the electric field is changed, the alignment of the liquid crystal molecules also changes. Since incident light is refracted based on the orientation of the liquid crystal molecules due to the optical anisotropy of the liquid crystal molecules, images can be displayed by controlling the light transmittance of the liquid crystal molecules.
Since the LCD device including thin film transistors as a switching element, referred to as an active matrix LCD (AM-LCD) device, has excellent characteristics of high resolution and displaying moving images, the AM-LCD device has been widely used.
The AM-LCD device includes an array substrate, a color filter substrate and a liquid crystal layer interposed therebetween. The array substrate may include a pixel electrode and a thin film transistor, and the color filter substrate may include a color filter layer and a common electrode. The AM-LCD device is driven by an electric field between the pixel electrode and the common electrode to have excellent properties of transmittance and aperture ratio. However, since the AM-LCD device uses a vertical electric field that is perpendicular to the substrates, the AM-LCD device has poor viewing angles.
An in-plane switching (IPS) mode LCD device having a wide viewing angle property has been suggested and developed to resolve the above-mentioned limitations.
FIG. 1 is a cross-sectional view of a related art IPS mode LCD device. As shown in FIG. 1, the IPS mode LCD device includes an upper substrate 9 and a lower substrate 10 spaced apart from and facing each other. A liquid crystal layer 11 is interposed between the upper and lower substrates 9 and 10. A common electrode 17 and a pixel electrode 30 are formed on the lower substrate 10. The common electrode 17 and the pixel electrode 30 may be disposed on the same level. Liquid crystal molecules of the liquid crystal layer 11 are driven by a horizontal electric field L, which is induced between the common and pixel electrodes 17 and 30. Although not shown in the figure, a color filter layer is formed on the upper substrate 9. The upper substrate 9 including the color filter layer may be referred to as a color filter layer. The lower substrate 10 including the common electrode 17 and the pixel electrode 30 may be referred to as an array substrate.
FIGS. 2A and 2B are cross-sectional views showing turned on/off conditions, respectively, of a related art IPS mode LCD device. As shown in FIG. 2A, when the voltage is applied to the IPS mode LCD device, arrangement of liquid crystal molecules 11a above the common electrode 17 and the pixel electrode 30 is unchanged. However, liquid crystal molecules 11b between the common electrode 17 and the pixel electrode 30 are horizontally arranged due to the horizontal electric field L. Since the liquid crystal molecules 11b are arranged by the horizontal electric field L, the IPS mode LCD device has a wide viewing angle property. For example, the IPS mode LCD device has viewing angles of about 80 degrees to about 85 degrees up and down and right and left without an image inversion or a color inversion.
FIG. 2B shows a condition when the voltage is not applied to the IPS mode LCD device. Because an electric field is not induced between the common and pixel electrodes 17 and 30, the arrangement of liquid crystal molecules 11 of the liquid crystal layer is not changed.
Therefore, the IPS mode LCD device has the improved viewing angles.
However, the IPS mode LCD device has disadvantages of low aperture ratio and transmittance. To improve the aperture ratio and transmittance of the IPS mode LCD device, a fringe field switching (FFS) mode LCD device has been suggested.
FIG. 3 is a cross-sectional view of a pixel region of an array substrate for a related art FFS mode LCD device.
As shown in FIG. 3, in the array substrate for the related art FFS mode LCD device, a gate line (not shown) and a data line 47, which cross each other to define a pixel region P, are formed with a gate insulating layer 45 interposed therebetween. A thin film transistor Tr is formed at the pixel region P and is connected to the gate line and the data line 47.
A pixel electrode 55 is formed at the pixel region P on the gate insulating layer 45 and is connected to a drain electrode 51 of the thin film transistor Tr. The pixel electrode 55 has a plate shape. Here, the pixel electrode 55 is formed on the same layer as the data line 47, i.e., the gate insulating layer 45 and is spaced apart from the data line 47 to prevent a short circuit with the data line 47.
A passivation layer 60 is formed on the data line 47 and the pixel electrode 55 substantially all over. The passivation layer 60 is formed of an inorganic insulating material. A common electrode 65 is formed on the passivation layer 60 substantially all over and includes openings oa corresponding to the pixel region P. The openings oa has a bar shape and are spaced apart from each other.
The array substrate for the related art FFS mode LCD device having the above-mentioned structure is manufactured through 5 mask processes: forming a gate line (not shown) and a gate electrode 43, forming a semiconductor layer 46 including an active layer 46a and ohmic contact layers 46b, the data line 47, and source and drain electrodes 49 and 51, forming the pixel electrode 55, forming the passivation layer 60 including a contact hole (not shown), and forming the common electrode 65 including the openings oa.
The mask process, which means a photolithographic process, includes steps of forming a photoresist layer after a material layer to be patterned is formed on a substrate, exposing the photoresist layer to light through a photo-mask which includes a light-blocking portion and a light-transmitting portion, developing the light-exposed photoresist layer to thereby form a photoresist pattern, etching the material layer using the photoresist pattern as an etching mask, and stripping the photoresist pattern. Therefore, to perform one mask process, many materials, process apparatuses and process time for every step are needed.
Since each mask process includes many steps, the manufacturing processes and costs are increased. Accordingly, decreasing the mask processes has been tried to reduce the manufacturing costs and increase the productivity.